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| LOW-POWER HEX TTL-TO-PECL TRANSLATOR FEATURES s s s s Operates from a single +5V supply Differential PECL outputs Function and pinout compatible with Fairchild F100K Available in 24-pin CERPACK and 28-pin PLCC packages SY100S391 DESCRIPTION The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this translation using only one +5V supply. The differential outputs allow each circuit to be used as an inverting/non-inverting translator, or as a differential line driver. A common enable (E), when LOW, holds all inverting outputs HIGH and all non-inverting inputs LOW. The SY100S391 is ideal for those mixed PECL/TTL applications which only have a +5V supply available. When used in the differential mode, the S391, due to its high common mode rejection, overcomes voltage gradients between the TTL and PECL ground systems. BLOCK DIAGRAM E PIN CONFIGURATIONS D0 Q0 GNDS D0 Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 Q5 Q5 D2 GND TTL GND PECL GNDS GND PECL E D3 12 13 14 15 16 17 18 D1 Q0 D1 11 10 9 8 7 6 5 4 3 Top View PLCC J28-1 2 1 28 27 26 19 20 21 22 23 24 25 Q2 Q2 VCCA VCC VCC Q3 Q3 D2 D3 E GND PECL GND PECL GND TTL D5 Q5 GNDS Q5 Q4 Q4 D4 D4 Q1 Q1 D3 D5 D4 1 2 3 4 5 6 24 23 22 21 20 19 18 Top View Flatpack F24-1 17 16 15 14 D2 D1 D0 Q0 Q0 Q1 Q1 PIN NAMES Pin D0 -- D5 Q0 -- Q5 Q0 -- Q5 E VCCA Function Data Inputs (TTL) Data Outputs (PECL) D5 Q5 Q5 Q4 Q4 13 7 8 9 10 11 12 Q3 Inverting Data Outputs (PECL) Enable Input (TTL) VCCO for ECL Outputs VCC VCCA Rev.: G Q2 Q2 Amendment: /0 1 Q3 Issue Date: July, 1999 Micrel SY100S391 TRUTH TABLE Inputs Dn H L H L E H H L L Qn H L L L Outputs Qn L H H H LOGIC SYMBOL D0 E Q0 Q0 D1 Q1 Q1 D2 Q2 Q2 D3 Q3 Q3 D4 D5 Q4 Q4 Q5 Q5 NOTE: 1. H = High Voltage Level, L = Low Voltage Level ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating TTL Input Voltage TTL Input Current (2) Value -0.5 to +7.0 -30 to +5.0 -50 -0.5 to +7.0 -65 to +150 +175 +150 Unit V V V V C C GUARANTEED OPERATING CONDITIONS Symbol TA VCC NOTE: 1. Do not exceed. (1) -- -- (2) Rating Operating Temperature Commercial Supply Voltage Value 0 to +85 +4.5 to +5.5 Unit C -- -- PECL Output Current (DC Output HIGH) VCC Pin Potential to Ground Pin Storage Temperature Max. Junction Temp. Ceramic Plastic V Tstore TJ NOTES: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. 2. Either voltage limit or current limit is siffucient to protect inputs. TTL-TO-PECL DC ELECTRICAL CHARACTERISTICS(1) VCC = +5.0V 10%; GND = 0V Symbol VOH VOL VOHC VOLC VIH VIL IIH IIL VCD ICC Parameter Output HIGH Voltage Output LOW Voltage Output HIGH Voltage Corner Point High Output LOW Voltage Corner Point Low Input HIGH Voltage Input LOW Voltage Input HIGH Current Breakdown Current Input LOW Current Dn E Min. VCC -1025 VCC -1890 VCC -1035 -- 2.0 0 -- -- -- -- 25 Typ. VCC -955 VCC -1705 -- -- -- -- -- -- -- -- -- Max. VCC -870 VCC -1620 -- VCC -1610 5.0 0.8 10 100 -0.8 -4.2 -1.2 69 mV mV V V A A mA V mA Over VTTL, VEE, TA Range Over VTTL, VEE, TA Range VIN = +2.7V VIN = +5.5V, VCC = Max. VIN = +0.5V IIN = -18mA Inputs Open Unit mV Condition VIN = VIH (Max.) or VIL (Min.) Loading with 50 to VCC -2V VIN = VIH (Min.) or VIL (Max.) Loading with 50 to VCC -2V Input Clamp Diode Voltage VCC Supply Current NOTE: 1. The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions. 2 Micrel SY100S391 AC ELECTRICAL CHARACTERISTICS CERPACK AND PLCC VCC = +5.0V 10% TA = 0C Symbol tPLH tPHL tTLH tTHL Parameter Propagation Delay Data and Enable to Output Transition Time 20% to 80%, 80% to 20% Min. 400 350 Max. 1400 1700 TA = +25C Min. 400 350 Max. 1400 1700 TA = +85C Min. 400 350 Max. 1400 1700 Unit ps ps Condition TIMING DIAGRAM 2.5 0.3ns INPUT 2.5 0.3ns 3.0V 90% 50% 10% 1.5V 0V tPHL COMPLEMENT tPLH 50% OUTPUT tPLH tPHL 80% 50% 20% TRUE tTLH tTHL Propagation Delay and Transition Times 3 Micrel SY100S391 TEST CIRCUIT VIH GNDTTL 0.1F 0.1F 0.1F L1 SCOPE CHAN A RT L2 50 100 -4V S/H RT PECL TERMINATOR NET L3 PULSE GENERATOR 0.1F 2.5F GNDPECL VCC PRODUCT ORDERING CODE Ordering Code SY100S391FC SY100S391JC SY100S391JCTR Package Type F24-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial 4 Micrel SY100S391 24 LEAD CERPACK (F24-1) Rev. 03 5 Micrel SY100S391 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 6 |
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